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Local mapping of interface traps using contactless capacitance transient technique
M. Takahashi, H. Yoshida, and S. Satoh: Proceedings. of the International. Meeting for Future of Electron Devices, Kansai, Osaka, 26-28 July 2004, pp.95–96.
S. Kuge, H. Yoshida, and S. Satoh: Proceedings of the 5th International Symposium on Advanced Science and Technology of Silicon Materials, Kona, Hawai, 10-14 November 2008, pp.78–82.
S. M. Sze, Physics of Semiconductor Devices, 2nd ed. (Wiley, New York, 1981), p. 21.
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Contactless capacitance transient techniques have been applied to local mapping of interface traps of a semiconductor wafer. In contactless capacitance transient techniques, a Metal-Air gap-Oxide-Semiconductor (MAOS) structure is used instead of a conventional Metal-Oxide-Semiconductor
(MOS) structure. The local mapping of interface traps was obtained by using a contactless Isothermal Capacitance Transient Spectroscopy (ICTS), which is one of the contactless capacitance transient techniques. The validity of the contactless ICTS was demonstrated by characterizing a partially Au-doped Si wafer. The results revealed that local mapping of interface traps using contactless capacitance transient techniques is effective in wafer inspection and is a promising technique for the development of MOS devices and solar cells with high reliability and high performance.
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