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A simulation study and measurements of the electrical conductance in a PbSe and PbS spherical Nano-crystal 3D matrix layer was carried out focusing on its dependences of Nano-crystal size distribution and size gradient along the layer thickness (z-direction). The study suggests a new concept of conductance enhancement by utilizing a size gradient along the layer thickness from mono-layer to the next mono-layer of the Nano-crystals, in order to create a gradient of the energy levels and thus improve directional conductance in this direction. A Monte Carlo simulation of the charge carriers path along the layer thickness of the Nano-crystals 3D matrix using the Miller-Abrahams hopping model was performed. We then compared the conductance characteristics of the gradual size 3D matrix layer to a constant-sized 3D matrix layer that was used as a reference in the simulation. The numerical calculations provided us with insights into the actual conductance mechanism of the PbSe and PbSNano-crystals 3D matrix and explained the discrepancies in actual conductance and the variability in measured mobilities published in the literature. It is found that the mobility and thus conductance are dependent on a critical electrical field generated between two adjacent nano-crystals. Our model explains the conductance dependents on the: Cathode-Anode distance, the distance between the adjacent nano-crystals in the 3D matrix layer and the size distribution along the current direction. Part of the model (current-voltage dependence) was validated using a current-voltage measurements taken on a constant size normal distribution nano-crystalsPbS layer (330nm thick) compared with the predicted I-V curves. It is shown that under a threshold bias, the current is very low, while after above a threshold bias the conductance is significantly increased due to increase of hopping probability. Once reaching the maximum probability the current tend to level-off reaching the maximal conductance available through the sequential hopping and nano crystals based layer behaves as a resistor under bias.


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