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One electron-controlled multiple-valued dynamic random-access-memory
1.Y. Takahashi, A. Fujiwara, K. Yamazaki, H. Namatsu, K. Kurihara, and K. Murase, Appl. Phys. Phys 76, 637-639 (2000).
3.K. Degawa, T. Aoki, T. Higuchi, H. Inokawa, and Y. Takahashi, IEICE Trans. Electron E 87-C, 1827 (2004).
5.S. J. Kim, C. K. Lee, R. S. Chung, E. S. Park, S. J. Shin, J. B. Choi, Y. S. Yu, N. S. Kim, H. G. Lee, and K. H. Park, IEEE Trans. Electron Devices 56, 1048 (2009).
11.S. J. Shin, C. S. Jung, B. J. Park, T. K. Yoon, J. J. Lee, S. J. Kim, J. B. Choi, Y. Takahashi, and D. G. Hasko, Appl. Phys. Lett 97, 103101 (2010).
13.J. B. Choi, in Toward Quantum FinFET; Lecture Notes in Nanoscale Science and Technology, edited by W. Han and Z. M. Wang (Springer International Publishing, Switzerland, 2013), Vol. 17, pp. 285-303.
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We propose a new architecture for a dynamic random-access-memory (DRAM) capable of storing multiple values by using a single-electron transistor (SET). The gate of a SET is designed to be connected to a plurality of DRAM unit cells that are arrayed at intersections of word lines and bitlines. In this SET-DRAM hybrid scheme, the multiple switching characteristics of SET enables multiple value data stored in a DRAM unit cell, and this increases the storage functionality of the device. Moreover, since refreshing data requires only a small amount of SET driving current, this enables device operating with low standby power consumption.
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