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A. Vallett, S. Minassian, P. Kaszuba, S. Datta, J. Redwing, and T. Mayer, Nano Let. 10, 4813 (2010).
A. M. Ionescu and H. Riel, Nature 479, 329 (2011).
Y. Zhu, N. Jain, D. K. Mohata, S. Datta, D. Lubyshev, J. M. Fastenau, A. K. Liu, and M. K. Hudait, J. Appl. Phys. 113, 0243191 (2013).
M. Gholizadeh and S. E. Hosseini, IEEE Trans. Electron Devices 61, 1494 (2014).
L. Britnell, R. V. Gorbachev, R. Jalil, B. D. Belle, F. Schedin, A. Mishchenko, T. Georgiou, M. I. Katsnelson, L. Eaves, S. V. Morozov, N. M. R. Peres, J. Leist, A. K. Geim, K. S. Novoselov, and L. A. Ponomarenko, Science 335, 947 (2012).
K. Ganapathi, Y. Yoon, and S. Salahuddin, Appl. Phys. Lett. 97, 0335041 (2010).
S. Marjani, S. E. Hosseini, and R. Faez, J. Comput. Electron. in press.
A. Revelant, A. Villalon, Y. Wu, A. Zaslavsky, C. L. Royer, H. Iwai, and S. Cristoloveanu, IEEE Trans. Electron Devices 61, 2674 (2014).
S. Marjani and S. E. Hosseini, Superlattices and Microstructures 76, 297 (2014).
S. E. Hosseini and M. Kamali Moghaddam, Mater. Sci. Semicond. Process. 30, 56 (2015).
M. H. Lee, J.-C. Lin, Y.-T. Wei, C.-W. Chen, W.-H. Tu, H.-K. Zhuang, and M. Tang, in Proceedings of the IEEE International Electron Devices Meeting (IEDM), 2013, p. 4.5.1.
M. H. Lee, Y.-T. Wei, J.-C. Lin, C.-W. Chen, W.-H. Tu, and M. Tang, AIP Advances 4, 1071171 (2014).
M. Kumar and S. Jit, IEEE Trans. Nanotechnol. 14, 597 (2015).
N. Setter, D. Damjanovic, L. Eng, G. Fox, S. Gevorgian, S. Hong, A. Kingon, H. Kohlstedt, N. Y. Park, G. B. Stephenson, I. Stolitchnov, A. K. Taganstev, D. V. Taylor, T. Yamada, and S. Streiffer, J. Appl. Phys. 100, 0516061 (2006).
J. Hutchby and M. Garner, in Workshop and ERD/ERM Working Group Meeting,, 2010, p. 1.
T. S. Boscke, Ph.D. dissertation, Technische Universität Hamburg-Harburg, 2010.
T. S. Boscke, J. Muller, D. Brauhaus, U. Schroder, and U. Bottger, Appl. Phys. Lett. 99, 1029031 (2011).
J. Muller, T. S. Boscke, D. Brauhaus, U. Schroder, U. Bottger, J. Sundqvist, P. Kucher, T. Mikolajick, and L. Frey, Appl. Phys. Lett. 99, 1129011 (2011).
E. Yurchuk, J. Muller, J. Paul, T. Schlosser, D. Martin, R. Hoffmann, S. Mueller, S. Slesazeck, U. Schroeder, R. Boschke, R. V. Bentum, and T. Mikolajick, IEEE Trans. Electron Devices 99, 3699 (2014).
M. Kobayashia and T. Hiramoto, AIP Advances 6, 0251131 (2016).
E. Yurchuk, J. Muller, S. Knebel, J. Sundqvist, A. P. Graham, T. Melde, U. Schroder, and T. Mikolajick, Thin Solid Films 533, 88 (2013).
R. P. Feynman, R. B. Leighton, and M. Sands, Lectures on Physics (Addison-Wesley: Reading, MA, USA, 1964).
S. Salahuddin and S. Datta, Nano Lett. 8, 405 (2007).
S. Marjani and S. E. Hosseini, J. Appl. Phys. 118, 0957081 (2015).
M. Baklanov, K. Maex and M. Green, Dielectric Films for Advanced Microelectronics; (John Wiley & Sons, NJ, USA, 2007) p. 438.
Q. Lu, R. Lin, P. Ranade, Y. C. Yeo, X. Meng, H. Takeuchi, T.-J. King, C. Hu, H. Luan, S. Lee, W. Bai, C.-H. Lee, D.-L. Kwong, X. Guo, X. Wang, and T.-P. Ma, in Proceedings of the IEEE International Electron Devices Meeting (IEDM), 2000, p. 641.
G. He and Z. Sun, High-k Gate Dielectrics for CMOS Technology; (John Wiley & Sons, NJ, USA, 2012) p.175176.
J. Yuan, C. Gruensfelder, K. Y. Lim, T. Wallner, M. K. Jung, M. J. Sherony, Y. M. Lee, J. Chen, C. W. Lai, and Y. T. Chow, in Proceedings of the IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), 2010, p. 66.
ATLAS Device Simulation Software, Silvaco Int., Santa Clara, CA, USA, 2012.
N. Cui, R. Liang, and J. Xu, Appl. Phys. Lett. 98, 1421051 (2011).
K. Ohashi, M. Fujimatsu, S. Iwata, and Y. Miyamoto, Jpn. J. Appl. Phys. 54, 04DF10-1 (2015).

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In this paper, a silicon–on–insulator (SOI) p–n–p–n tunneling field–effect transistor (TFET) with a silicon doped hafnium oxide (Si:HfO) ferroelectric gate stack is proposed and investigated via 2D device simulation with a calibrated nonlocal band–to–band tunneling model. Utilization of Si:HfO instead of conventional perovskite ferroelectrics such as lead zirconium titanate (PbZrTiO) and strontium bismuth tantalate (SrBiTaO) provides compatibility to the CMOS process as well as improved device scalability. By using Si:HfO ferroelectric gate stack, the applied gate voltage is effectively amplified that causes increased electric field at the tunneling junction and reduced tunneling barrier width. Compared with the conventional p–n–p–n SOI TFET, the on–state current and switching state current ratio are appreciably increased; and the average subthreshold slope () is effectively reduced. The simulation results of Si:HfO ferroelectric p–n–p–n SOI TFET show significant improvement in transconductance (9.8X enhancement) at high overdrive voltage and average subthreshold slope (35% enhancement over nine decades of drain current) at room temperature, indicating that this device is a promising candidate to strengthen the performance of p–n–p–n and conventional TFET for a switching performance.


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