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Suppress temperature instability of InGaZnO thin film transistors by N2O plasma treatment, including thermal-induced hole trapping phenomenon under gate bias stress
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10.1063/1.4709417
/content/aip/journal/apl/100/18/10.1063/1.4709417
http://aip.metastore.ingenta.com/content/aip/journal/apl/100/18/10.1063/1.4709417
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

(a) ID-V G curves of as-fabricated a-IGZO TFTs at the different temperatures. (b) The corresponding threshold voltage shift with the different temperatures.

Image of FIG. 2.
FIG. 2.

The energy band diagrams of proposed mechanisms for these two distinctive regions: (a) the gate voltage is below VT and (b) the gate voltage is above VT.

Image of FIG. 3.
FIG. 3.

(a) I D-V G curves of N2O plasma treatment a-IGZO TFTs at the different temperatures. (b) Schematic passivation layer deposition process of as-fabricated and N2O plasma treatment devices.

Image of FIG. 4.
FIG. 4.

Threshold voltage shift under negative gate bias at 400 K with as-fabricated and N2O plasma treatment devices.

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/content/aip/journal/apl/100/18/10.1063/1.4709417
2012-05-02
2014-04-20
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Suppress temperature instability of InGaZnO thin film transistors by N2O plasma treatment, including thermal-induced hole trapping phenomenon under gate bias stress
http://aip.metastore.ingenta.com/content/aip/journal/apl/100/18/10.1063/1.4709417
10.1063/1.4709417
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