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The asymmetrical degradation behavior on drain bias stress under illumination for InGaZnO thin film transistors
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10.1063/1.4722787
/content/aip/journal/apl/100/22/10.1063/1.4722787
http://aip.metastore.ingenta.com/content/aip/journal/apl/100/22/10.1063/1.4722787
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

ID-VG characteristics of a-IGZO TFTs before and after (a) DBIS and (b) G-DBIS. (c) CCH-VG transfer characteristics of the a-IGZO TFT before and after the DBIS and G-DBIS. The insert shows the CCH-VG curves as a function of applied stress time during DBIS.

Image of FIG. 2.
FIG. 2.

The (a) CGS-VG and (b) CGD-VG transfer characteristics of the a-IGZO TFT before and after the DBIS and G-DBIS. (c) The CGD-VG transfer curves of the a-IGZO TFT after the drain bias stress with different gate biases.

Image of FIG. 3.
FIG. 3.

Schematic diagram of hole-trapping mechanism in (a) the first stage and (b) the second stage of the DBIS. (c) Schematic diagram of electron-trapping mechanism after the G-DBIS.

Image of FIG. 4.
FIG. 4.

The non-uniform hole-trapping model of electrical properties of CGD-VG curves obtained from device simulation.

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/content/aip/journal/apl/100/22/10.1063/1.4722787
2012-05-29
2014-04-24
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: The asymmetrical degradation behavior on drain bias stress under illumination for InGaZnO thin film transistors
http://aip.metastore.ingenta.com/content/aip/journal/apl/100/22/10.1063/1.4722787
10.1063/1.4722787
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