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(Color online) (a) The effective channel resistivity (ρ eff) for In2O3/Ga2O3 devices fixed with 3.5 nm-thick In2O3 but varied in the Ga2O3 layer thickness, inset: TLM data on device with 3.5/0.57 nm In2O3/Ga2O3, and (b) dependence of ρ eff on the Ga2O3 thickness ratio according to the In2O3/Ga2O3 layer structures listed in Table I.
(Color online) (a) Schematic layout of the MIS-capacitor sample B with 2 nm/30 nm Ga2O3/In2O3. (b) High and low C-V data on MIS-capacitor samples A/B and normalized to the Si3N4 gate capacitance (Ci = 17.9 pf). Inset: extracted interfacial trap charge density (Dit ) as a function of gate bias.
(Color online) (a) Output and (b) transfer characteristics for In2O3/Ga2O3 TFT sample having an equivalent film resistivity ρeff = 9.2 × 104 Ω cm and Ga2O3 layer thickness ratio R = 14.3%. Inset: (a) schematic layout of the TFT structure, (b) the extraction of threshold voltage.
(Color online) Dependence of field-effect mobility (μ FE) in In2O3/Ga2O3 TFTs having various Ga2O3 layer thickness ratio R. Inset: the subthreshold swing S and the extracted trap density of the subgap states Dsg for devices at low gate bias (VGS = 1.5 V) and in the low resistivity regime (<105 Ω cm).
Summary of the equivalent film resistivity and current ON/OFF ratio for TFT devices studied in Figs. 1(b) and 4 with various In2O3/Ga2O3 thickness combination.
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