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A semiconductor under insulator technology in indium phosphide
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10.1063/1.4760231
/content/aip/journal/apl/101/15/10.1063/1.4760231
http://aip.metastore.ingenta.com/content/aip/journal/apl/101/15/10.1063/1.4760231
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Figures

Image of FIG. 1.
FIG. 1.

(a) The edge facet of an extended InP PhC-W1 membrane, (b) the edge facet of an InP strip waveguide supported under alumina deposited by ALD, (c) enlarged image of dashed box in (b) showing the InP strip waveguide supported by the conformal ALD alumina layer, (d) InP-SUI strip waveguide interfacing a PhC-W1 membrane structure. Inset is an enlarged image of the area in the dashed box showing the interface between the alumina-supported InP strip waveguide and the PhC-W1 membrane. The arrow in the inset points to a slightly thicker region of the strip waveguide identifying the alumina support layer.

Image of FIG. 2.
FIG. 2.

Finite element eigenvalue analysis of (a) silicon on insulator with an effective index of 2.56 and (b) InP under insulator with an effective index of 2.28. Calculation results show high confinement of the electric field for both SOI and InP-SUI waveguides. Mode propagation is in the z direction as indicated by the axis.

Image of FIG. 3.
FIG. 3.

Optical transmission with associated waveguide SEM image of (a) 1 mm InP-SUI strip waveguide, (b) 1 mm InP-SUI strip waveguide with a 20 μm integrated PhC W1 membrane in the middle of the waveguide (as shown in Figure 1(c)) and (c) a 500 μm end-to-end PhC-W1 membrane (where edge facet of this waveguide is shown in Figure 1(a)). The inset illustrates the transmission setup used to measure output transmission of the waveguides.

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/content/aip/journal/apl/101/15/10.1063/1.4760231
2012-10-11
2014-04-18
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: A semiconductor under insulator technology in indium phosphide
http://aip.metastore.ingenta.com/content/aip/journal/apl/101/15/10.1063/1.4760231
10.1063/1.4760231
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