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Simplified process flow: (a) Boron diffusion; (b) patterning the device layer and removing the exposed BOX layer; (c) Al deposition and patterning to form traces and pads; (d) 1st 3 μm parylene deposition; (e) patterning the parylene openings and etching away underneath metal traces; (f) XeF2 etching to release the devices; (g) 2nd 10 μm parylene deposition; (h) patterning the parylene layer and releasing the device.
A bent flexible device held by a pair of tweezers.
Optical micrograph of four MOSFETs with different channel widths.
SEM image of a MOSFET integrated on the flexible substrate.
Cross sectional SEM image of the flexible device.
(a) I sd-V sd curves of one PMOS device with different V sg; (b) shift of I sd-V sd curves of one PMOS device when the device was deformed (V sg is fixed at 15 V).
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