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(a) Schematic offset between the A-site interface ( ) and the B-site ( ) due to the LTO insertion. (b) Temperature dependence of the sheet resistance and (c) the sheet carrier density and Hall mobility for representative samples with a LAO thickness of 3 uc, (3, y), at T = 2 K. The inset of (b) shows a schematic of the structure of the samples. Data for LAO (10 uc)/STO from Ref. 17 are also plotted at y = 0 in (c) for reference. Lines in (c) are guides.
Conductivity variation with different LAO and LTO thicknesses. Circles represent metallic conductivity, and crosses represent the insulating behavior. Observed phase boundary is indicated with a solid line. Dashed line shows the predicted phase boundary uc if the LTO is assumed to behave as a simple polar stack.
dependence of the sheet carrier density and Hall mobility of the sample (3, 0.25) extracted from a two-carrier fit at T = 2 K. Dashed gray line shows the slope expected from the capacitance between the interface and gate contact; other lines are guides. Inset shows the schematic carrier distribution at the interface in the two-carrier model. z-axis points in the STO substrate direction.
Hall mobility vs. sheet carrier density achieved by back-gating several LAO/LTO/STO heterostructures at T = 2 K. Arrows for each data set correspond to the direction of increasing from −100 V to V. Lines are a guide. Inset shows schematic electron distribution along depth direction in STO, z, for various .
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