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/content/aip/journal/apl/103/12/10.1063/1.4821295
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/content/aip/journal/apl/103/12/10.1063/1.4821295
2013-09-16
2016-12-04

Abstract

A 60 Gigahertz (GHz) on-chip differential-feed dipole antenna integrated in a 65 nm complementary metal oxide semiconductor (CMOS) technology is investigated by simulation and measurement. It was found that it is important to model lossy thin well layer on the surface of CMOS substrate. Simulated frequency characteristic of scattering parameters agreed well with measured one. The simulated radiation efficiency was 3.4%. The loss factor was estimated by electromagnetic simulation, and it was found that low radiation efficiency was mainly due to the existence of the lossy layer and high conductivity of 10 S/m of silicon substrate.

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