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(a) ID-VG and corresponding Gm-VG at linear region measurement shows no significant change in S.S. (b) Forward ID-VG and the reverse ID-VG (source/drain interchanged) at the saturation region measurement after dynamic HCS for high-k/metal gate n-MOSFETs. Inset shows the lateral energy band diagram with hole trapping lowering the VTH at the reverse ID-VG measurement.
ID-VG and corresponding IB-VG measurement at VD = 2.4 V showing GIDL current decrease after dynamic HCS. Inset shows that hole trapping increases band-to-band tunneling distance.
ICP-VG,high shows an increase of 330% and VFB shift of 0.5 V toward the negative direction during dynamic HCS. Inset shows one-side floating CP technique with floating source or drain terminal to measure ICP.
(a) Diagram of n-MOSFET structure showing hole trapping and interface state generation at the drain side. (b) The lateral energy band diagram indicating that trapping holes form a buffer region at the depletion region to reduce the stress electron field. (c) The energy band diagram shows only shallow states generated after dynamic HCS.
Normalized CGD curves at various frequencies before and after dynamic HCS. Inset shows the lateral energy band diagram of electron trapping and detrapping behavior for higher and lower measurement frequencies.
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