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/content/aip/journal/apl/104/2/10.1063/1.4861598
2014-01-13
2016-12-11

Abstract

We report on the electrical performance of silane-treated silicon nanowires configured as + + field effect transistors. The functionalization of the silicon oxide shell with (3-aminopropyl)triethoxysilane controls the formation of the conduction channel in the trapezoidal cross-section nanowires. By carefully adjusting the surface conditioning protocol, robust electrical characteristics were achieved in terms of device-to-device reproducibility for the studied silicon nanowire transistors: the standard deviation displays a fourfold decrease for the threshold voltage together with a sevenfold improvement for the subthreshold slope.

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