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(a) Schematic of the dual-gate GFET, consisting of a poly-G channel on top of an insulator layer, which is grown on a heavily-doped Si wafer acting as the back gate. An artistic view of the patchwork of coalescing graphene grains of varying lattice orientations and size is shown in (b). The source and drain electrodes contact the poly-G channel from the top and are assumed to be ohmic. The source is grounded and considered the reference potential in the device. The electrostatic modulation of the carrier concentration in graphene is achieved via a top-gate stack consisting of the gate dielectric and the gate metal.
Quantum capacitance (a) and density of states (b) of polycrystalline graphene considering different average grain sizes. The PG case has also been plotted for the sake of comparison.
Transfer characteristics (a) and transconductance (c) of the graphene field-effect transistor considering different samples of polycrystalline graphene as the active channel. (b) Estimated low-field carrier mobility as a function of the carrier density for each of the samples.
Output characteristics (a) and output conductance (b) of the graphene field-effect transistor considering different samples of polycrystalline graphene as the active channel.
Intrinsic gain as a function of the drain voltage. The transconductance and output conductance are also plotted at Vgs = −0.25 V.
Intrinsic maximum and cutoff frequency for the simulated transistor assuming a channel length of 100 nm.
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