No data available.
Please log in to see this content.
You have no subscription access to this content.
No metrics data to plot.
The attempt to load metrics for this article has failed.
The attempt to plot a graph for these metrics has failed.
The full text of this article is not currently available.
Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors
1. S. Mandal, G. Dell'Erba, A. Luzio, S. G. Bucella, A. Perinot, A. Calloni, G. Berti, G. Bussetti, L. Duò, A. Facchetti, Y.-Y. Noh, and M. Caironi, Org. Electron. 20, 132 (2015).
5. P. H. Lau, K. Takei, C. Wang, Y. Ju, J. Kim, Z. Yu, T. Takahashi, G. Cho, and A. Javey, Nano Lett. 13, 3864 (2013).
8. J. Zhang, Y. Fu, C. Wang, P.-C. Chen, Z. Liu, W. Wei, C. Wu, M. E. Thompson, and C. Zhou, Nano Lett. 11, 4852 (2011).
9. M. Halik, H. Klauk, U. Zschieschang, G. Schmid, C. Dehm, M. Schütz, S. Maisch, F. Effenberger, M. Brunnbauer, and F. Stellacci, Nature 431, 963 (2004).
22. S. P. Schiessl, N. Fröhlich, M. Held, F. Gannott, M. Schweiger, M. Forster, U. Scherf, and J. Zaumseil, ACS Appl. Mater. Interfaces 7, 682 (2015).
29. S. M. Sze and K. K. Ng, Physics of Semiconductor Devices ( Wiley-Interscience, Hoboken, NJ, 2007).
Article metrics loading...
Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfOx) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes
(SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states at the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100–300 nF/cm2) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfOx
Full text loading...
Most read this month