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Estimating oxide‐trap, interface‐trap, and border‐trap charge densities in metal‐oxide‐semiconductor transistors
1.D. M. Fleetwood, P. S. Winokur, R. A. Reber, Jr., T. L. Meisenheimer, J. R. Schwank, M. R. Shaneyfelt, and L. C. Riewe, J. Appl. Phys. 73, 5058 (1993). Equation (6) of Ref. 1 is in error; (number per unit area) should be replaced by (number per unit area per unit energy). Numerical estimates of in Ref. 1 are not affected significantly, so the conclusions are unaffected.
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15.Here, we use the extrapolated method of Ref. 7. There it was found that using twice the bulk potential could lead to better agreement between I-V and CP estimates of when border-trap effects are ignored, in the limit of small border-trap densities. In the presence of significant border-trap densities, we feel the approach outlined here is a more complete treatment of the charge separation problem.
16.In this letter we focus on separating border-trap effects from interface-trap effects at normal MOS device switching speeds. Other techniques (e.g., capacitance-voltage hysteresis) must be used to estimate the densities of border traps (often called slow states) that communicate with the Si on much slower time scales (well below 1 Hz) which would be categorized as bulk-oxide traps via the DTBT technique.
17.In particular, for ultrathin oxides ( less than ) and/or for devices having oxide-trap charge distributed evenly through the bulk of the oxide, both “2’s” disappear from the right-hand side of Eq. (3) (Ref. 13).
18.M. R. Shaneyfelt, D. M. Fleetwood, P. S. Winokur, J. R. Schwank, and T. L. Meisenheimer, IEEE Trans. Nucl. Sci. 40, 1678 (1993).
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