Full text loading...
Normalized current as a function of time for different dc stress times (a). Ratio of released charge to total trapped charge as a function of dc stress time (inset). Partition of trapped charge between reversibly and irreversibly trapped charge as a function of gate voltage after stressing the devices for (b).
shift calculated according to Eq. (1) as a function of time for different pulse lengths and duty cycles (a). The time units are defined as follows. For , the abscissa is the gate on-time, for , the abscissa is the real time. shift measured with low duty cycle biasing as a function of gate-on time for different gate voltages (b). For all the curves shown in the figure, the recovery measured after the biasing cycle was . The parameters used to fit the curves to Eq. (2) were , , and , and was extracted from transfer measurements prior to stressing the device. varied between 4 and .
as a function of according to Eq. (5). The parameters used to calculate were extracted from the fit of the curve of Fig. 2(b) and are as follows: , , , and .
Article metrics loading...