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Room-temperature single-electron effects in silicon nanocrystal memories
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10.1063/1.2123377
/content/aip/journal/apl/87/18/10.1063/1.2123377
http://aip.metastore.ingenta.com/content/aip/journal/apl/87/18/10.1063/1.2123377
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

High-resolution TEM image of a nanocrystal memory device. One silicon island has been highlighted by a contour line.

Image of FIG. 2.
FIG. 2.

Block diagram of the experimental setup used for the electrical characterization of the single-electron effects in nanocrystal memories.

Image of FIG. 3.
FIG. 3.

Drain current versus gate voltage of a written ( for ) and erased ( for ) nanocrystal memory device. The two curves present a similar shape and are shifted in voltage.

Image of FIG. 4.
FIG. 4.

Evolution of the drain current at and at of a memory device previously written by applying for . As highlighted in the inset, a stepwise behavior is clearly observed.

Image of FIG. 5.
FIG. 5.

Evolution of the drain current shifts and of the threshold voltage shifts at and at of a memory device previously written by applying for .

Image of FIG. 6.
FIG. 6.

Histogram of the threshold voltage shifts at and at of a memory device previously written by applying for . In order to increase the sample population, we have cumulated the results of ten measurements realized on the same memory device. Inset: Histogram of the electron emission times.

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/content/aip/journal/apl/87/18/10.1063/1.2123377
2005-10-25
2014-04-18
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Room-temperature single-electron effects in silicon nanocrystal memories
http://aip.metastore.ingenta.com/content/aip/journal/apl/87/18/10.1063/1.2123377
10.1063/1.2123377
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