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(a) Schematic image of the multilayer MOS structure, (b) TEM image of the realized structure with three layers of Si nanocrystals embedded in .
High frequency characteristics of the sample (a) with two layers, and (b) with three layers. The widths of hysteresis gradually widen with increased the programming bias.
The dependence of the memory window on programming voltage. There are three apparent stages observed for the three layer sample, and two stages for the two layer sample. Each stage is spaced by about .
Retention characteristics of the three layer sample after charging at different writing biases.
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