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(a) SEM image of nanowires grown on -plane sapphire. (b) TEM image of as-grown nanowires. (c) SEM of core-shell nanowires after the PLD process. Inset: SEM image of a nanowire revealing both the core and the shell. (d) TEM image of a core-shell nanowire. The diameter of core is and the coating layer is . Inset is the SAED pattern from the core-shell nanowire.
(Color online) XRD results of core-shell nanowire samples with different Co content. In each curve, the left peak corresponds to (002) and the number is its value. The right peak is indexed to (110) of -plane sapphire substrates. Inset: a plot of the value of core-shell nanowires vs the Co content .
(Color online) (a) Gate-dependent curves recorded at room temperature for a core-shell nanowire transistor. Inset shows current vs gate voltage at . (b) Temperature dependence of the device resistance.
(Color online) Magnetoresistance recorded at , 20, and , while a magnetic field applied normal to the sample substrate was swept between .
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