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(Color online) (a) Schematic of the band diagram of the composite quantum well. (b) Schematic of the enhancement-mode single-electron transistor, where one electron is induced in the InAs layer by a top metal gate. (c) The dc current-voltage characteristic of a gated single-electron transistor, where the drain current is plotted against the sweeping gate voltage. The inset shows a scanning electron micrograph of a transistor where the scale bar is in length. (d) Same as that in (a), but with a different drain current scale where the peaks in the current results from a single-electron tunneling.
(Color online) (a) The dc current-voltage characteristic of a gated Hall bar transistor. The insets plot the schematic potential profiles along the current direction for three operating regimes, where is the first electron (hole) subband in the InAs (GaSb) layer. (b) Calculated potential profiles when the first (dashed curve, where the center of the dot is shifted for comparison of the tunneling barrier) and the second quantization levels (solid) are aligned with the Fermi level. Here the Coulomb charging energy is excluded and the shaded areas illustrate the tunneling barriers. The insets show the model capacitor structure and a simulated 2D potential plot, where and dimensions are and the energy span is .
(Color online) Diamond chart of an enhancement-mode SET measured at .
The capacitances and the addition energies obtained from the diamonds in Fig 3.
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