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Charge trapping and dielectric relaxation in connection with breakdown of high- gate dielectric stacks
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10.1063/1.2203942
/content/aip/journal/apl/88/20/10.1063/1.2203942
http://aip.metastore.ingenta.com/content/aip/journal/apl/88/20/10.1063/1.2203942

Figures

Image of FIG. 1.
FIG. 1.

(Color online) Ramp-relax test result on .

Image of FIG. 2.
FIG. 2.

(Color online) Ramp-relax test result on .

Image of FIG. 3.
FIG. 3.

(Color online) Two-step breakdown mode of and in ramp-relax tests.

Tables

Generic image for table
Table I.

Gate stack structures, fabrication conditions, and capacitor properties.

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/content/aip/journal/apl/88/20/10.1063/1.2203942
2006-05-17
2014-04-23
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Charge trapping and dielectric relaxation in connection with breakdown of high-k gate dielectric stacks
http://aip.metastore.ingenta.com/content/aip/journal/apl/88/20/10.1063/1.2203942
10.1063/1.2203942
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