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Low-voltage organic transistors on a polymer substrate with an aluminum foil gate fabricated by a laminating and electropolishing process
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10.1063/1.2361265
/content/aip/journal/apl/89/15/10.1063/1.2361265
http://aip.metastore.ingenta.com/content/aip/journal/apl/89/15/10.1063/1.2361265
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

Schematic cross section of a pentacene OFET on a PEN substrate. The gate electrode was fabricated by electropolishing the surface of roll-to-roll laminated Al foil on a PEN substrate with a double-faced adhesive PET film used as the adhesive layer.

Image of FIG. 2.
FIG. 2.

(Color online) AFM images of (a) laminated Al foil, (b) electropolished Al foil, and (c) gate dielectric based on electropolished Al foil. The rms roughnesses were (a) , (b) , and (c) .

Image of FIG. 3.
FIG. 3.

(Color online) (a) AFM image and height profile of the gate dielectric (inset: the rms roughness within the boxed region was ). (b) AFM height (upper) and phase (bottom) images of the -thick pentacene film on the gate dielectric.

Image of FIG. 4.
FIG. 4.

(a) Output characteristics of the pentacene OFETs as functions of the gate voltage. (b) Transfer characteristics of the pentacene OFETs (drain-source ), drain current (solid line), and gate leakage current (dashed line).

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/content/aip/journal/apl/89/15/10.1063/1.2361265
2006-10-12
2014-04-23
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Low-voltage organic transistors on a polymer substrate with an aluminum foil gate fabricated by a laminating and electropolishing process
http://aip.metastore.ingenta.com/content/aip/journal/apl/89/15/10.1063/1.2361265
10.1063/1.2361265
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