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Improved memory window for Ge nanocrystals embedded in SiON layer
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10.1063/1.2362972
    + View Affiliations - Hide Affiliations
    Affiliations:
    1 Institute of Electronics, National Chiao Tung University, Hsin-Chu 300, Taiwan, Republic of China
    2 Department of Physics, National Sun Yat-Sen University, Kaohsiung 80424, Taiwan, Republic of China; Institute of Electro-Optical Engineering, National Sun Yat-Sen University, Kaohsiung 80424, Taiwan, Republic of China; and Center for Nanoscience and Nanotechnology, National Sun Yat-Sen University, Kaohsiung 80424, Taiwan, Republic of China
    3 Department of Photonics, National Chiao Tung University, Hsin-Chu 300, Taiwan, Republic of China and Display Institute, National Chiao Tung University, Hsin-Chu 300, Taiwan, Republic of China
    4 Institute of Electronics, National Chiao Tung University, Hsin-Chu 300, Taiwan, Republic of China
    a) Electronic mail: tcchang@mail.phys.nsysu.edu.tw
    Appl. Phys. Lett. 89, 162105 (2006); http://dx.doi.org/10.1063/1.2362972
/content/aip/journal/apl/89/16/10.1063/1.2362972
http://aip.metastore.ingenta.com/content/aip/journal/apl/89/16/10.1063/1.2362972

Figures

Image of FIG. 1.
FIG. 1.

Capacitance-voltage hysteresis of the MOIOS structure for SiON as charge trap center. The electrical measurements are performed by bidirectional voltage sweeping (1) from and from and (2) from and from . The insert is the diagram for charge trapping center for SiON layer.

Image of FIG. 2.
FIG. 2.

Capacitance-voltage hysteresis of the MOIOS structure for Ge nanocrystal embedded in layer as charge trap center. The electrical measurements are performed by bidirectional voltage sweeping from and from . The insert is the diagram for charge trapping center for Ge nanocrystal embedded in layer.

Image of FIG. 3.
FIG. 3.

Capacitance-voltage hysteresis of the MOIOS structure for Ge nanocrystal embedded in SiON layer as charge trap center. The electrical measurements are performed by bidirectional voltage sweeping from and from . The insert is the diagram for charge trapping center for Ge nanocrystal embedded in SiON layer.

Tables

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Table I.

Memory windows for three types of nonvolatile memory devices.

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/content/aip/journal/apl/89/16/10.1063/1.2362972
2006-10-18
2014-04-24
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Improved memory window for Ge nanocrystals embedded in SiON layer
http://aip.metastore.ingenta.com/content/aip/journal/apl/89/16/10.1063/1.2362972
10.1063/1.2362972
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