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Mechanism of improved channel carrier mobility for stacked gate dielectric
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10.1063/1.2363141
/content/aip/journal/apl/89/17/10.1063/1.2363141
http://aip.metastore.ingenta.com/content/aip/journal/apl/89/17/10.1063/1.2363141
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

(Color online) Electron mobility extracted by split technique at various temperatures. The transistor size is .

Image of FIG. 2.
FIG. 2.

(Color online) Mobility limited by phonon scattering vs temperature for various effective fields . The inset shows the mobility dependence on channel inversion charge density.

Image of FIG. 3.
FIG. 3.

(Color online) Positive bias temperature instability characteristics. . Subthreshold swing during the stress is shown in the inset. The same stress field is applied to both dielectrics. The transistor size is . The measurement temperature is .

Image of FIG. 4.
FIG. 4.

(Color online) from pulse measurement with different (initial ). Base voltage of gate pulse is . Both rising time and falling time of pulse are . Pulse width is . The transistor size is . The measurement temperature is .

Image of FIG. 5.
FIG. 5.

(Color online) Stress induced leakage current characteristics for transistors under various stress fields . The transistor size is . The measurement temperature is .

Image of FIG. 6.
FIG. 6.

(Color online) Normalized capacitance-time transient characteristics. The bias voltages for accumulation and deep depletion are and , respectively. The capacitor area is . The measurement temperature is .

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/content/aip/journal/apl/89/17/10.1063/1.2363141
2006-10-23
2014-04-23
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Mechanism of improved channel carrier mobility for stacked Y2O3∕HfO2 gate dielectric
http://aip.metastore.ingenta.com/content/aip/journal/apl/89/17/10.1063/1.2363141
10.1063/1.2363141
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