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Silicon single electron transistors aiming at a high gate modulation factor
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10.1063/1.2370874
/content/aip/journal/apl/89/17/10.1063/1.2370874
http://aip.metastore.ingenta.com/content/aip/journal/apl/89/17/10.1063/1.2370874
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

(a) Three-dimensional schematic illustration of the SET; (b) SEM image of the EBL patterned device; (c) top view of the structure, where the gate is just on the top of the QD; (d) side-view along the AB direction, where the Si layer under the ⟨001⟩-oriented gate line is removed; and (e) side view along the CD direction.

Image of FIG. 2.
FIG. 2.

characteristics of device A measured at RT. (a) Typical CB oscillations, ; (b) clear NDCs and fine structures observed at different .

Image of FIG. 3.
FIG. 3.

characteristic of device B measured at and RT, .

Image of FIG. 4.
FIG. 4.

Dependence of calculated voltage gain on gate modulation factor , supposing .

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/content/aip/journal/apl/89/17/10.1063/1.2370874
2006-10-27
2014-04-20
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Silicon single electron transistors aiming at a high gate modulation factor
http://aip.metastore.ingenta.com/content/aip/journal/apl/89/17/10.1063/1.2370874
10.1063/1.2370874
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