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(Color online) A schematic image (a) and a LEEM image (b) of Au alloy islands self-arranged at single-layer steps on Si(111) surface.
(Color online) (a) A schematic drawing of the growth procedure for GaP nanowires. Cross-sectional SEM images of the GaP wires grown by different growth procedures for comparison: (b1) cosupplied of TMGa and and (b2) presupplied of before TMGa supply; (c1) using 500 and two-step growth and (c2) only growth; (d1) V/III of 46 and (d2) V/III of 184.
(Color online) (a) SEM images of GaP nanowire. (a1) Top view and (a2) 38° view from surface normal direction. (b) A TEM image of a GaP nanowire. (c) EDS mapping images of Si, Ga, P, and O at the wire-substrate interface.
(Color online) (a1) Mapping images of height and current at for short GaP nanowires. (a2) Current-voltage graph at the wire (1) and the surface (2) in (a1).
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