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Chip cooling with integrated carbon nanotube microfin architectures
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See EPAPS Document No.E-APPLAB-90-021711
for the consecutive steps of device fabrication; soldering the flip chip onto the substrate; usage of solder flux; and finally a block of aligned nanotube structure along its Cr/Cu sputtered side was positioned and soldered on the chip by a fine-placer. This document can be reached via a direct link in the online article’s HTML reference section or via the EPAPS homepage (http://www.aip.org/pubservs/epap.html
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Efficient cooling of silicon chips using microfin structures made of aligned multiwalled carbon nanotube arrays is achieved. The tiny cooling elements mounted on the back side of the chips enable power dissipation from the heated chips on the level of modern electronics demands. The nanotube fins are mechanically superior compared to other materials being ten times lighter, flexible, and stiff at the same time. These properties accompanied with the relative simplicity of the fabrication makes the nanotubestructures strong candidates for future on-chip thermal management applications.
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