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Schematic of (a) a single-gate (SG) TFET device and (b) a double-gate (DG) TFET device. (c) Extracted energy band diagram for DG TFET along the source-to-channel direction at the surface based on 2D numerical device simulation, illustrating the modulation of the tunneling barrier width from the off state to the on state.
(a) Comparison of the gate characteristics between SG TFET and DG TFET devices, clearly showing the advantage of employing a double-gate structure. Excellent subthreshold swing is achieved with times on-state current enhancement for the DG TFET device. (b) Plot of on-state drain current and average current density as a function of silicon film thickness . The device operation spans from the regime of volume limitation to that of single-gate control limitation.
(a) Electric potential extracted along the direction near the band-to-band tunneling region of the source-channel interface. (b) Tunneling barrier width extracted near the surface and the center of the film for various silicon thicknesses.
(a) Plot of band-to-band tunneling rate along the direction near the source-channel region. (b) Integration of along the direction showing the optimal point for maximum tunneling current.
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