Full text loading...
(a) Schematic illustration of FEC measurement. and are source-drain bias and gate voltage, respectively. is the capacitance between the gate and the DWCNT, and is the self-capacitance of the DWCNT. is the potential applied on the tube. (b) Sketch of energy bands of the outer semiconducting shell (middle part) and the inner metallic shell (right part) near the Fermi level . is the bottom (top) of the conduction (valence) band and is the energy gap. The big arrows indicate the moving directions of under . (c) The DOS in the outer shell without and with an intershell coupling which leads to a nonzero DOS in the gap region.
S-M DWCNT (a) is modeled by a two-leg ladder (b) on which a tight-binding model is defined. is the hopping coefficient in leg A (B), and is the interchain hopping coefficient.
Logarithm of vs gate voltage when is used. Inset: The logarithm of vs at .
Article metrics loading...