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Enhancement-mode InP -channel metal-oxide-semiconductor field-effect transistors with atomic-layer-deposited dielectrics
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View: Figures


Image of FIG. 1.
FIG. 1.

(a) Cross section of an inversion-channel E-mode MOSFET. (b) characteristic of a mask gate length InP MOSFET with a ALD as a gate dielectric.

Image of FIG. 2.
FIG. 2.

(a) Measured channel resistance vs different mask gate lengths as a function of gate bias. Three dashed fitting lines are used to determine and . (b) Extrinsic (empty) and intrinsic (solid) drain currents and transconductance vs gate bias. The dashed lines are guide for the eyes to determine the threshold voltage of the device. (c) The threshold voltage vs the gate length determined from five different methods using the intrinsic characteristics of devices. RM refers to the ratio method; ELR refers to the extrapolation in the linear region method; SDL refers to second derivative logarithmic method; SD refers to second derivative method; MP refers to match-point method. (d) Subthreshold characteristics of a device. S.S. refers to subthreshold slope and DIBL refers to drain induced barrier lowing.

Image of FIG. 3.
FIG. 3.

(a) Effective electron mobility vs effective electric field on InP substrate with ALD as a gate dielectric. Inset: split to determine the total inversion charge for the mobility calculation. (b) characteristics of MOS structures at multiple frequencies from down to quasistatic. The data are taken at room temperature and in the dark.


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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Enhancement-mode InP n-channel metal-oxide-semiconductor field-effect transistors with atomic-layer-deposited Al2O3 dielectrics