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Enhancement-mode GaAs metal-oxide-semiconductor high-electron-mobility transistors with atomic layer deposited as gate dielectric
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10.1063/1.2814052
/content/aip/journal/apl/91/21/10.1063/1.2814052
http://aip.metastore.ingenta.com/content/aip/journal/apl/91/21/10.1063/1.2814052
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

(a) A cross section of an E-mode MOS-HEMT and (b) characteristic of a gate-length GaAs MOS-HEMT with a ALD as a gate dielectric.

Image of FIG. 2.
FIG. 2.

(a) Drain current vs gate bias in both forward (filled circles) and reverse (empty circles) sweep directions. The solid line is extrinsic transconductance vs gate bias at . (b) Bidirectional and gate capacitance vs gate voltage with both source and drain grounded.

Image of FIG. 3.
FIG. 3.

(a) Subthreshold characteristics of three devices with , and without oxide at . (b) Gate leakage characteristics of the same three devices with both source and drain grounded. (c) Effective mobility vs effective field measured from gate-length devices at .

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/content/aip/journal/apl/91/21/10.1063/1.2814052
2007-11-19
2014-04-23
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Enhancement-mode GaAs metal-oxide-semiconductor high-electron-mobility transistors with atomic layer deposited Al2O3 as gate dielectric
http://aip.metastore.ingenta.com/content/aip/journal/apl/91/21/10.1063/1.2814052
10.1063/1.2814052
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