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The schematic drawing of the memory device with structure on silicon(001) wafer.
The TEM morphology of the films deposited on NaCl single crystal substrates and the corresponding electron diffraction pattern is shown by the inset.
The conductance-voltage plot of the memory cell with an effective diameter of by using programming voltage sweep , and corresponding current-voltage plot is shown by the inset.
(a) The write-read-erase-read cycles for the memory devices with the effective diameter of . The test has been performed for times, and the data have been smoothed. (b) The details of the turn-off process of the memory device with an effective diameter of , the data were picked from the origin data of (a) before smoothed. (c) The details of the turn-on process of the memory device with effective diameter of ; the data were picked from the origin data of (a) before smoothed.
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