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Lifetime modeling for stress-induced voiding in integrated circuit interconnections
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10.1063/1.2766695
/content/aip/journal/apl/91/6/10.1063/1.2766695
http://aip.metastore.ingenta.com/content/aip/journal/apl/91/6/10.1063/1.2766695
/content/aip/journal/apl/91/6/10.1063/1.2766695
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/content/aip/journal/apl/91/6/10.1063/1.2766695
2007-08-06
2014-12-21
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Lifetime modeling for stress-induced voiding in integrated circuit interconnections
http://aip.metastore.ingenta.com/content/aip/journal/apl/91/6/10.1063/1.2766695
10.1063/1.2766695
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