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(Color online) (a) Schematic structure of our patterned double layer dielectric. Thin PVP layer was patterned on the layer by UV light through a shadow mask. (b) Absorption spectra of oven-cured standard PVP sample and UV-cured samples. We chose the UV illumination as an optimum curing condition to imitate the oven-curing effects. (c) Schematic 3D structure of our inverter which consists of two -type TFTs. The ratios of both transistors are identical to be . Load TFT was illuminated with weak UV.
(Color online) (a) vs and vs curves obtained from our TFTs at . (b) characteristics measured from Au/pentacene/bilayer/ITO structure for the pristine and the UV treated pentacene. The inset shows the back side illumination scheme.
Voltage transfer characteristics (VTCs) of our inverters composed of two pristine TFTs (line) and a pristine driver TFT and a UV-treated load TFT (circle). The insets are inverter circuit schematics. [Please note the depletion mode channel of the load TFT illuminated by UV (left-side inset).]
(Color online) VTC curves of the inverters obtained within an input range of under various conditions: , , , and . The inset graphs show the voltage gain curves derived from the various VTC curves.
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