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Effect of hot-carrier-induced interface states distribution on linear drain current degradation in -type lateral diffused metal-oxide-semiconductor transistors
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View: Figures


Image of FIG. 1.
FIG. 1.

(a) Schematic cross section of the -type LDMOS device used in this paper. (b) The experimental setup of charge pumping measurement.

Image of FIG. 2.
FIG. 2.

(a) degradation and shift as a function of stress time for devices stressed under and ranging from . Higher produces more degradation, while shift is little for devices stressed under . (b) vs characteristics under various reveal that Kirk effect is not significant under high .

Image of FIG. 3.
FIG. 3.

Stress-induced as a function of for the devices shown in Fig. 2(a) stressed for .

Image of FIG. 4.
FIG. 4.

Location dependent and as well as degradation resulted from at different locations are simulated. The drain-side polygate edge is defined as 0 in coordinate. in region produces the most degradation, while in region produces the least degradation.

Image of FIG. 5.
FIG. 5.

Relationship between degradation and average in region is shown. A unified relationship is observed for devices stressed under . For the device stressed at , larger degradation is observed because in region also contributes to degradation.


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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Effect of hot-carrier-induced interface states distribution on linear drain current degradation in 0.35μmn-type lateral diffused metal-oxide-semiconductor transistors