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Fabrication of gate stack with high gate work function for implantless enhancement-mode GaAs -channel metal-oxide-semiconductor field effect transistor applications
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10.1063/1.2905259
/content/aip/journal/apl/92/12/10.1063/1.2905259
http://aip.metastore.ingenta.com/content/aip/journal/apl/92/12/10.1063/1.2905259
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Figures

Image of FIG. 1.
FIG. 1.

Requirements of to achieve a nonconductive channel at zero gate voltage, as well as the corresponding series resistance in the implantless device with a structure shown in the inset as a function of for different . The doping concentration of the GaAs epilayer is . The inset shows the simulated typical characteristics of the device.

Image of FIG. 2.
FIG. 2.

(a) Typical curves of MOS capacitors with and gate stacks on Si substrates measured at a frequency of . (b) vs plot shows the work function of and TaN metal gates are 4.96 and , respectively.

Image of FIG. 3.
FIG. 3.

(a) characteristics of passivated GaAs MOS capacitors with gate stacks measured at various frequencies. (b) vs plot of metal gate shows a high of . The inset shows the corresponding curves with excellent behavior.

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/content/aip/journal/apl/92/12/10.1063/1.2905259
2008-03-28
2014-04-25
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Fabrication of gate stack with high gate work function for implantless enhancement-mode GaAs n-channel metal-oxide-semiconductor field effect transistor applications
http://aip.metastore.ingenta.com/content/aip/journal/apl/92/12/10.1063/1.2905259
10.1063/1.2905259
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