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Negative bias temperature instability and relaxation in HfSiON gate stack field effect devices
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10.1063/1.2912025
/content/aip/journal/apl/92/15/10.1063/1.2912025
http://aip.metastore.ingenta.com/content/aip/journal/apl/92/15/10.1063/1.2912025
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

Exponent of the time dependence of the threshold voltage shift under NBTI (◻) and from Eq. (2) (○) determined from the experimental data and plotted as a function of . is determined to be .

Image of FIG. 2.
FIG. 2.

Time dependent variation of the interface state and dielectric trapped positive charge contributions to the threshold voltage shift induced by stressing (source/drain/substrate shorted) with a gate potential of for up to (open symbols) then relaxing with gate/substrate/source and drain electrodes shorted (closed symbols). (○,●) interface term, (◻,◼) dielectric trapped charge term. The temperature was .

Image of FIG. 3.
FIG. 3.

Plots of the measured threshold voltage shift (sum of interfacial and trapped charge terms) as a function of the reduced mobility variation for the devices subjected to NBTI and relaxation at . (◻) during NBTI, (▴) during relaxation with all electrodes shorted.

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/content/aip/journal/apl/92/15/10.1063/1.2912025
2008-04-18
2014-04-19
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Negative bias temperature instability and relaxation in HfSiON gate stack field effect devices
http://aip.metastore.ingenta.com/content/aip/journal/apl/92/15/10.1063/1.2912025
10.1063/1.2912025
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