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(a) characteristics at of the MOS device with gate on Hf-silicate film with at different annealing temperatures. (b) The vs EOT plots for the gate after different annealings. The inset shows with consideration of interface.
AES depth profiles of -silicate/Si MOS structure as a function of annealing temperature.
HRTEM images of -silicate stack at as-deposited state and after annealing at under atmosphere.
(a) EOT vs leakage current density plot at for gates on Hf-silicate dielectric of different annealing temperatures. The Inset shows the hysteresis of -silicate/Si MOS capacitors as a function of annealing temperature.
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