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Potential barriers to electron carriers in field-effect transistors
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Figures

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FIG. 1.

(a) Device structure of thin-film FET. (b) Output characteristics, (c) transfer characteristics at (linear region), and (d) transfer characteristics at (saturation region), for FET with at .

Image of FIG. 2.

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FIG. 2.

Arrhenius plots of (a) resistance at linear region, and (b) at saturation region for FET with , for various in steps.

Image of FIG. 3.

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FIG. 3.

(a) vs plots at (closed marks) and (open marks) for devices with (circle) and (square). (b) dependence of estimated from saturation region for various in steps. Lines are guides for the eye.

Tables

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Table I.

Size and device parameters of all devices. Values at upper and lower lines were estimated from linear and saturation regions, respectively, with formulas in the text.

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/content/aip/journal/apl/92/17/10.1063/1.2917469
2008-04-28
2014-04-25

Abstract

Transport properties of field-effect transistors(FETs) have been investigated in the temperature range between 160 and . Activation energy was estimated from temperature dependence of resistance at the linear region and of current at the saturation region for various channel lengths. Variation of activation energy values is attributed to carrier injection barrier at contact between source electrode and channel, and barriers to carrier hopping between trap states in the channel of .

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Scitation: Potential barriers to electron carriers in C60 field-effect transistors
http://aip.metastore.ingenta.com/content/aip/journal/apl/92/17/10.1063/1.2917469
10.1063/1.2917469
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