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(a) The schematic energy band diagram of the Au nanocrystal embedded MOS capacitor with triply stacked tunnel layer at flatband condition. (b) and (c) shows the band bending profile of the stacked tunnel layer under positive (programming) and negative (erasing) gate voltages, respectively.
Cross-sectional HRTEM image of the fabricated MOS structure with Au nanocrystals and AHS triply stacked tunnel oxides.
(a) High frequency (1 MHz) characteristics of the Au nanocrystal embedded MOS capacitor with AHS multilayer tunnel oxides in different gate voltage sweep ranges. Negligible flatband voltage shift of the reference sample at gate voltages is shown in the inset. (b) Flatband voltage as a function of gate voltage measured from the relations.
(a) Relations between flatband voltage shift and pulse time at different gate biases. (b) Erasing performance of the MOS capacitor: programmed at and erased with a gate pulse of .
Charge retention characteristics of the MOS capacitor with AHS multilayer tunnel oxides after stressing at gate voltage for 10 s.
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