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Bandgap engineering of tunnel oxide with multistacked layers of for Au-nanocrystal memory application
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10.1063/1.2995862
/content/aip/journal/apl/93/13/10.1063/1.2995862
http://aip.metastore.ingenta.com/content/aip/journal/apl/93/13/10.1063/1.2995862
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

(a) The schematic energy band diagram of the Au nanocrystal embedded MOS capacitor with triply stacked tunnel layer at flatband condition. (b) and (c) shows the band bending profile of the stacked tunnel layer under positive (programming) and negative (erasing) gate voltages, respectively.

Image of FIG. 2.
FIG. 2.

Cross-sectional HRTEM image of the fabricated MOS structure with Au nanocrystals and AHS triply stacked tunnel oxides.

Image of FIG. 3.
FIG. 3.

(a) High frequency (1 MHz) characteristics of the Au nanocrystal embedded MOS capacitor with AHS multilayer tunnel oxides in different gate voltage sweep ranges. Negligible flatband voltage shift of the reference sample at gate voltages is shown in the inset. (b) Flatband voltage as a function of gate voltage measured from the relations.

Image of FIG. 4.
FIG. 4.

(a) Relations between flatband voltage shift and pulse time at different gate biases. (b) Erasing performance of the MOS capacitor: programmed at and erased with a gate pulse of .

Image of FIG. 5.
FIG. 5.

Charge retention characteristics of the MOS capacitor with AHS multilayer tunnel oxides after stressing at gate voltage for 10 s.

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/content/aip/journal/apl/93/13/10.1063/1.2995862
2008-10-02
2014-04-16
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Bandgap engineering of tunnel oxide with multistacked layers of Al2O3/HfO2/SiO2 for Au-nanocrystal memory application
http://aip.metastore.ingenta.com/content/aip/journal/apl/93/13/10.1063/1.2995862
10.1063/1.2995862
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