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(a) Process flow of the conventional buried catalyst method and the via interconnect structure. (b) The schematic of IMD interface rupture on a wafer. (c) and (d) represent a sample without and with the BE line patterning, respectively.
SEM images of preliminary CNT growth results carried out with carrier gas to prevent the unwanted reduction of the oxidized catalyst on nonpatterned samples. (a) Few CNTs on the oxidized NiO layer, (b) grown CNTs on the pristine Ni layer, and (c) grown CNTs on the reduced Ni layer. (d) Time flow chart for and carrier gas systems. Dark area at each chart shows the period of reduction.
XPS results of (a) the pristine Ni layer, (b) the oxidized NiO layer, (c) the reduced Ni layer, (d) NiO reference, and (e) Ni reference. Chemical composition of the pristine Ni layer is effectively changed to NiO and vice versa by oxidation and reduction processes, respectively.
CNT via interconnects without the interface rupture problem using NiO catalyst layer. (a) Via hole structure having oxidized Ni layer and selectively reduced catalyst layer. (b) SEM image of CNT interconnects.
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