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Dynamic-gate operation in nanoelectronic amplifiers due to reduced screening
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10.1063/1.3035852
/content/aip/journal/apl/93/20/10.1063/1.3035852
http://aip.metastore.ingenta.com/content/aip/journal/apl/93/20/10.1063/1.3035852
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Figures

Image of FIG. 1.
FIG. 1.

(a) Left part: electron microscope image of a Y-branch nanojunction defined by etched trenches in a modulation doped GaAs/AlGaAs heterostructure. The branch used as gate has a geometrical width close to branching section of about 50 nm. Four side gates define the working point of the device. The used circuit diagram is shown in the right part. (b) Bistable switching is associated with two different charge configurations in the Y-branch with either (left sketch) no electrons (bright contrast) in the low-dimensional gate and the channel conducting (dark contrast) or (right part) electrons in the gate and a pinched-off channel. (c) Equivalent circuits for dynamic-gate operation. Left part: no charge penetration into the branch gate is reflected by a resistance at the gate entrance larger than at the gate end. Thus no charge can be added to the channel by changing the gate potential. Classical gate operation (dotted line reflects rigid gate capacitor) is assumed to be very weak. Right part: if the ratio is small charge can penetrate into the branch gate, which induces a change of the charge in the channel.

Image of FIG. 2.
FIG. 2.

(a) curves for different drain voltages. With increasing drain voltage a transition from stable to bistable switching is observed. (b) Maximum differential voltage gain as a function of the drain voltage. Close to the bistable transition a large increase in is observed. The solid curve was calculated from Eq. (2). (c) Experimentally observed drain current vs the gate voltage. (d) Theoretical curves modeled by Eq. (2) given in the text for temperatures ranging between 16 and 22 K. A transition from stable to bistable switching takes place at . Inset: differential voltage gain vs the relative change of the gate voltage.

Image of FIG. 3.
FIG. 3.

Drain current and inverse switching voltage vs gate voltage determined at for a QPC (a) and a Y-branch (b). For the maximum of is indicated by an arrow. exceeds for the Y-branch. (c) Maximum of for a QPC and a Y-branch for different temperatures between 10 and 30 K. The solid lines were calculated using Eq. (3).

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/content/aip/journal/apl/93/20/10.1063/1.3035852
2008-11-19
2014-04-18
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Dynamic-gate operation in nanoelectronic amplifiers due to reduced screening
http://aip.metastore.ingenta.com/content/aip/journal/apl/93/20/10.1063/1.3035852
10.1063/1.3035852
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