1887
banner image
No data available.
Please log in to see this content.
You have no subscription access to this content.
No metrics data to plot.
The attempt to load metrics for this article has failed.
The attempt to plot a graph for these metrics has failed.
Room temperature memory operation of a single InAs quantum dot layer in a heterostructure
Rent:
Rent this article for
USD
10.1063/1.2967880
/content/aip/journal/apl/93/6/10.1063/1.2967880
http://aip.metastore.ingenta.com/content/aip/journal/apl/93/6/10.1063/1.2967880
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

(a) Schematic cross section of the layer sequence grown by molecular beam epitaxy. (b) Sketch of the conduction band of a modulation-doped heterostructure along the axis of growth. The position of the self-assembled QD layer is schematically indicated.

Image of FIG. 2.
FIG. 2.

SEM image of the QW transistor together with the electric setup. (b) Conductance of the QW for a small drain-source voltage at . (c) Drain current vs gate voltage for at RT.

Image of FIG. 3.
FIG. 3.

Frequency count of the threshold hysteresis for maximum gate voltages in the range from . (b) Upper part: the charging pulse applied at the in-plane gates vs time . Lower part: corresponding system response vs the time for at RT. Inset: current vs time for .

Loading

Article metrics loading...

/content/aip/journal/apl/93/6/10.1063/1.2967880
2008-08-11
2014-04-18
Loading

Full text loading...

This is a required field
Please enter a valid email address
752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Room temperature memory operation of a single InAs quantum dot layer in a GaAs∕AlGaAs heterostructure
http://aip.metastore.ingenta.com/content/aip/journal/apl/93/6/10.1063/1.2967880
10.1063/1.2967880
SEARCH_EXPAND_ITEM