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XRD patterns of ZnO and films deposited on substrates. Both films were annealed at for 1 h at air ambient. The inset shows the schematic structure of the device.
curves of a memory cell in semilog scale based on capacitor. Before measurement, a forming process was carried out by applying a 30 mA pulse with a delay time of 50 ms. Arrows indicate the sweeping directions.
curves of a switching memory cell plotted in log-log scale. The colorful lines show the fitting results in both HRS and LRS.
Resistance evolution of HRS and LRS of the device as a function of the switching cycle. The resistance values were read out at 0.5 V in each sweep.
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