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Resistive switching behavior of devices for nonvolatile memory applications
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10.1063/1.2978158
/content/aip/journal/apl/93/9/10.1063/1.2978158
http://aip.metastore.ingenta.com/content/aip/journal/apl/93/9/10.1063/1.2978158
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

XRD patterns of ZnO and films deposited on substrates. Both films were annealed at for 1 h at air ambient. The inset shows the schematic structure of the device.

Image of FIG. 2.
FIG. 2.

curves of a memory cell in semilog scale based on capacitor. Before measurement, a forming process was carried out by applying a 30 mA pulse with a delay time of 50 ms. Arrows indicate the sweeping directions.

Image of FIG. 3.
FIG. 3.

curves of a switching memory cell plotted in log-log scale. The colorful lines show the fitting results in both HRS and LRS.

Image of FIG. 4.
FIG. 4.

Resistance evolution of HRS and LRS of the device as a function of the switching cycle. The resistance values were read out at 0.5 V in each sweep.

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/content/aip/journal/apl/93/9/10.1063/1.2978158
2008-09-02
2014-04-18
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Resistive switching behavior of Pt/Mg0.2Zn0.8O/Pt devices for nonvolatile memory applications
http://aip.metastore.ingenta.com/content/aip/journal/apl/93/9/10.1063/1.2978158
10.1063/1.2978158
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