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Cross-sectional HRTEM images of the fabricated MOS structures with Au nanocrystals and AHA triply stacked tunnel oxides in (a) 1 nm/2 nm/3 nm [S123], (b) 2 nm/2 nm/2 nm [S222], and (c) 3 nm/2 nm/1 nm [S321] piling up sequences. The total thickness of each tunnel oxide is fixed at 6 nm.
[(a)–(c)] High frequency (1 MHz) characteristics of samples S123, S222, and S321, respectively, in various ranges of the swept gate voltage. Negligible flatband voltage shift of the reference samples at ±10 V gate voltages is shown in the insets (-●-: with Au nanocrystal, -◼-: without Au nanocrystal). (d) Relations between flatband voltage shift and gate voltage for samples S123, S222, and S321. The inset shows the stored electron density (, vertical axis) against gate voltage (V, horizontal axis) in each measured MOS capacitor.
Comparisons of hole injection efficiency of samples S123, S222, and S321 by applying different negative gate voltages in pulse time and measuring relative flatband voltage shifts.
Simulated distributions of local enhancement of electric field Induced around a Au nanocrystal for samples S123, S222, and S321.
Charge retention characteristics of samples S123, S222, and S321 under 10 V/10 s and −10 V/10 s gate voltage.
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