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Lanthanide-based graded barrier structure for enhanced nanocrystal memory properties
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10.1063/1.3224188
/content/aip/journal/apl/95/11/10.1063/1.3224188
http://aip.metastore.ingenta.com/content/aip/journal/apl/95/11/10.1063/1.3224188
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

(a) Cross-sectional TEM image of the Ge nanocrystals embedded in the amorphous film stack after annealing at . Figure inset shows the schematic illustration of the device structure and (b) planar TEM image of the Ge nanocrystals embedded in the film. Figure inset shows the high resolution image of a single crystalline Ge nanocrystal.

Image of FIG. 2.
FIG. 2.

RBS spectra for the annealed gate dielectric stack with the curve fitted using SIMNRA 6.03 for the evaluation of compositional depth distributions.

Image of FIG. 3.
FIG. 3.

(a) High-frequency (100 kHz) capacitance-voltage of the MIS memory capacitor device annealed at 400 and plotted together with the reference curve without Ge and (b) flatband voltage of the 400 and annealed devices measured after applying sequential increasing programming pulse voltages for 1 s.

Image of FIG. 4.
FIG. 4.

(a) Retention characteristics of the 400 and annealed memory capacitor device after applying positive and negative stress voltages of for 10 s at room temperature and (b) schematic energy band diagram of the memory capacitor device structure comprising Ge nanocrystals sandwiched between tunnel dielectric and control dielectric stack under flatband condition; and illustration of electron (solid circle) and hole (open circle) discharging path through the tunnel dielectric stack under retention mode.

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/content/aip/journal/apl/95/11/10.1063/1.3224188
2009-09-16
2014-04-23
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Lanthanide-based graded barrier structure for enhanced nanocrystal memory properties
http://aip.metastore.ingenta.com/content/aip/journal/apl/95/11/10.1063/1.3224188
10.1063/1.3224188
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