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Schematic diagram detailing the fabrication process: (a) LED wafer, (b) the wafer coated with a monolayer of plain silica nanosphere, (c) residue of nanosphere with etched pattern beneath during etching, and (d) the PBG structure formed after removing the residue.
(a) HE fabrication model. (b) shows a nanopillar array with slightly inclined sidewall, after etching for 120 s. (c) The final arrayed HE PBG structure formed when etching time increased to 290 s.
Simulated (a) TE and (b) TM band structure. (c) Plot of simulated TE PBG vs etch selectivity. (d) Results of FDTD simulation showing energy flux distribution across the HE array structure.
(a) Measured transmission spectrum, with reference to a GaN LED as-grown sample, measured and normalized angle-resolved PL spectrum for (b) as-grown sample and (c) PBG structure, and (d) measured PL angular emission pattern from the PBG structure.
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