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Si Esaki diodes with high peak to valley current ratios
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10.1063/1.3274136
/content/aip/journal/apl/95/24/10.1063/1.3274136
http://aip.metastore.ingenta.com/content/aip/journal/apl/95/24/10.1063/1.3274136

Figures

Image of FIG. 1.
FIG. 1.

Schematic structure of a Silicon Esaki diode with a high boron doped buried layer, an intrinsic tunnel region, and a high antimony doped top contact layer.

Image of FIG. 2.
FIG. 2.

Room temperature current density vs voltage characteristics of Esaki diodes with different radii. The nominal MBE thickness of intrinsic region is 0 nm. The inset shows the Esaki diode with a PCD of and a PCVR of 2.5.

Image of FIG. 3.
FIG. 3.

Room temperature current density vs voltage characteristics of an Esaki structure with a radius of . The nominal MBE thickness of intrinsic region is 5 nm. The inset shows the linear plot of the J-V curve with NDR.

Tables

Generic image for table
Table I.

Comparison of literature data of room temperature PVCR for different Si tunneling diodes grown with MBE.

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/content/aip/journal/apl/95/24/10.1063/1.3274136
2009-12-15
2014-04-21
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Si Esaki diodes with high peak to valley current ratios
http://aip.metastore.ingenta.com/content/aip/journal/apl/95/24/10.1063/1.3274136
10.1063/1.3274136
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