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Hole-based memory operation in an InAs/GaAs quantum dot heterostructure
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10.1063/1.3275758
/content/aip/journal/apl/95/24/10.1063/1.3275758
http://aip.metastore.ingenta.com/content/aip/journal/apl/95/24/10.1063/1.3275758
View: Figures

Figures

Image of FIG. 1.
FIG. 1.

(a) Schematic cross section of the layer structure. (b) Sketch of the QD-Flash prototype. Hall-contacts are used for transport measurements of the 2DHG.

Image of FIG. 2.
FIG. 2.

Schematic illustration of the storage (a), write (b), and erase (c) operations in the QD-Flash prototype.

Image of FIG. 3.
FIG. 3.

(a) Hysteresis at 50 K. (b) Temperature dependence of the hysteresis opening for a sweep time of 1 and 100 ms, respectively.

Image of FIG. 4.
FIG. 4.

Drain current transients at 50 K at a storage voltage of 0 V (a), 0.4 V (b), and 0.7 V (c). Insets show the valence band profiles at the given voltages.

Image of FIG. 5.
FIG. 5.

Write times (a) and erase times (b) in dependence on the pulse voltage.

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/content/aip/journal/apl/95/24/10.1063/1.3275758
2009-12-18
2014-04-16
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752b84549af89a08dbdd7fdb8b9568b5 journal.articlezxybnytfddd
Scitation: Hole-based memory operation in an InAs/GaAs quantum dot heterostructure
http://aip.metastore.ingenta.com/content/aip/journal/apl/95/24/10.1063/1.3275758
10.1063/1.3275758
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